This invention relates to a method of plasma etching a silicon carbide workpiece, and to related apparatus.
Silicon carbide is widely acknowledged as being an extremely difficult material to etch. It can be difficult to achieve etched features in silicon carbide which are substantially free of defects. Without being limited by any particular theory or conjecture, it is believed that this is due to surface imperfections formed in the substrate during previous process steps.
FIG. 1A is an optical micrograph showing 80 μm (dia.) vias 100 microns deep in SiC containing defects following SiC etching using SF6/He plasma in a prior art process, and FIG. 1B is an optical micrograph showing a top down image showing defect formation during plasma etching of SiC in a prior art process. These optical micrographs show typical defects resulting from plasma etching of silicon carbide using SF6/O2, SF6/O2/He, SF6/O2/Ar, or SF6/O2/Ar/He process gases. SiC layers are typically lapped down to ca. 100 micron thickness and bonded to carrier wafers prior to patterning and plasma etching. Significant defect formation is observed.
Nickel is frequently used as a hard mask for etching features such as vias into silicon carbide. A typical prior art process is shown in FIG. 2, in which (FIG. 2A) a thin barrier or adhesion layer of 50 nm Ti or TiW 3 is deposited on a SiC wafer 4, followed by deposition of a seed layer of ca. 0.5 micron gold 2. A photoresist 1 is then formed on the gold seed layer 2 using known photolithographic processes to define the position of the mask. A nickel mask 5 (typically ca. 5 microns thickness) is electroplated onto the gold seed layer 2 (FIG. 2B). After electroplating with nickel, the photoresist is stripped and the seed layers over the vias removed by wet chemistry as can be seen in FIG. 2C. More particularly, gold is removed with KI solution and TiW is removed with hydrogen peroxide. FIG. 2D shows the results of an anisotropic SiC via etch process, showing a single etched via 6.
As stated above, FIG. 2C depicts a processing stage after the photoresist has been stripped and the seed layers over the vias removed by wet chemistry. If processing then directly proceeds with a bulk etch step, then typically heavy defect formation is observed. It is common for greater than 50% of vias features to contain defects. It is known to perform a breakthrough step prior to commencement of the bulk etch step. A breakthrough step is a specific step of process conditions which are used to initiate the SiC etch step, prior to the bulk etch step. An argon plasma breakthrough step has been used for this purpose, and this is often enhanced by the addition of some oxygen to remove traces of photoresist or other organic material. In some instances this is sufficient to clear seed layer residues. However, depending on the level of residue that is present, a breakthrough step of this type may be insufficient to remove residues and damage prior to the main, bulk, SiC etch step, resulting in the presence of defects in the etched product. An example of a workpiece where the simple breakthrough step using an argon plasma is insufficient to avoid defect formation is lapped (but unpolished) silicon carbide. It has been suggested that the defects are caused by residues of seed layers present and dislocations created by the SiC lapping step (Ju-Ai Ruan et al, SiC Substrate Via Etch Process Optimisation, CS MANTECH Conference, May 18-21, 2009, Tampa, Fla., USA). Also, it has been recommended to reduce defect formation by controlling various process parameters during the bulk etch step, such as by reducing pressure (Ruan et al, ibid; Semiconductor Today Compounds & Advanced Silicon, Vol. 4, 10, December 2009/January 2010, 54-55; N Okamoto et al, Backside Process Considerations for Fabricating Millimeter-Wave GaN HEMT MMICs, CS MANTECH Conference, May 17-20, 2010, Portland, Oreg., USA).